IGLOO2 FPGA Evalyasyon Twous
Quickstart Kat
Kontni Twous—M2GL-EVAL-KIT
| Kantite | Deskripsyon |
| 1 | IGLOO2 FPGA 12K LE M2GL010T-1FGG484 Evaluation Board |
| 1 | 12 V, 2 A AC pouvwa adaptè |
| 1 | FlashPro4 JTAG pwogramè |
| 1 | USB 2.0 A-Male to Mini-B cable |
| 1 | Quickstart kat |
Plis paseview
The Microsemi IGLOO® 2 FPGA Evaluation Kit makes it easier to develop embedded applications that involve motor control, system management, industrial automation, and high-speed serial I/O applications such as PCIe, SGMII, and user-customizable serial interfaces. The kit offers best-in-class feature integration coupled with the lowest power, proven security, and exceptional reliability. The board is also small form-factor PCIe-compliant, which allows quick prototyping and evaluation using any desktop PC or laptop with a PCIe slot.
Twous la pèmèt ou:
- Devlope epi teste desen liy PCI Express Gen2 x1
- Tès bon jan kalite siyal nan transceiver FPGA la lè l sèvi avèk pè yo plen-duplex SerDes SMA
- Mezire konsomasyon pouvwa ki ba nan IGLOO2 FPGA la
- Kreye rapidman yon lyen PCIe k ap travay ak Demo PCIe Control Plane ki enkli ladan li
Karakteristik Materyèl
- 12K LE IGLOO2 FPGA nan pake FGG484 (M2GL010T-1FGG484)
- 64 Mb SPI memwa flash
- 512 Mb LPDDR
- PCI Express Gen2 x1 koòdone
- Kat konektè SMA pou teste chanèl SerDes plen duplex
- RJ45 koòdone pou 10/100/1000 Ethernet
- JTAG/SPI koòdone pwogramasyon
- Tèt pou I2C, SPI, ak GPIOs
- Bouton pouse-bouton ak LED pou rezon Demo
- Pwen tès mezi aktyèl yo
Kouri Demo a
The IGLOO2 FPGA Evaluation Kit is shipped with the PCI Express Control Plane demo preloaded.
Instructions on running the demo design are available in the IGLOO2 FPGA Evaluation Kit PCIe Control Plane Demo user guide. See the Documentation Resources section for more information.
Pwogramasyon
Twous Evalyasyon IGLOO2 FPGA la vini ak yon pwogramè FlashPro4. Pwogramasyon entegre ak Twous Evalyasyon IGLOO2 FPGA disponib tou, epi li sipòte pa Libero SoC v11.4 SP1 oswa pita.
Anviwònman kavalye
| Kavalye | Fonksyon Twous Devlopman | Broch | Faktori Default |
| J23 | Chwazi antre MUX bò switch A oswa B sou bò liy lan | 1-2 (input A to the line side) that is on board 125 MHz differential clock oscillator output will be routed to line side | Fèmen |
| 2-3 (antre B sou bò liy lan) ki se yon revèy ekstèn ki nesesè pou sous atravè konektè SMA sou bò liy lan. | Louvri | ||
| J22 | Chwazi kontwòl aktive pwodiksyon an pou pwodiksyon bò liy yo | 1-2 (pwodiksyon bò liy lan aktive) | Fèmen |
| 2-3 (line-side output disabled) | Louvri | ||
| J24 | Bay ekipman VBUS pou USB lè w ap itilize li nan mòd Host. | Louvri | |
| J8 | Chwazi ant header RVI oswa header FP4 pou debogaj aplikasyon an. | 1-2 FP4 pou SoftConsole/FlashPro | Fèmen |
| 2-3 RVI pou Keil ULINK/IAR J-Link | Louvri | ||
| 2-4 pou chanje JTAGSiyal _SEL a distans lè l sèvi avèk kapasite GPIO chip FT4232 la | Louvri | ||
| J3 | Selects either the SW2 input or the ENABLE_FT4232 signal from the FT4232H chip | 1-2 pou chanjman pouvwa manyèl lè l sèvi avèk switch SW7 la | Fèmen |
| 2-3 for remote power switch using the GPIO capability of the FT4232 chip | Louvri | ||
| J31 | Chwazi ant FTDI JTAG pwogramasyon ak pwogramasyon esklav FTDI | 1-2 pou FlashPro FTDI JTAG pwogramasyon | Fèmen |
| 2-3 for SRI slave programming | Louvri | ||
| J32 | Chwazi ant FTDI SPI ak SC_SCI header | 1-2 pou pwogramasyon atravè FTDI SPI | Fèmen |
| 2-3 pou pwogramasyon atravè header SC_SPI a | Louvri | ||
| J35 | Chwazi ant header FP4 ak FTDI JTAG | 1-2 pou pwogramasyon atravè header FP4 la | Fèmen |
| 2-3 pou pwogramasyon atravè FTDI JTAG | Louvri |
Lojisyèl ak Lisans
Libero® SoC Design Suite ofri pwodiktivite segondè ak zouti devlopman konplè, fasil-a-aprann, fasil-a-adopte pou konsepsyon ak FPGA ak SoC Microsemi ki ba pouvwa. Suite a entegre estanda endistri Synopsys Synplify Pro® sentèz ak Mentor Graphics ModelSim® simulation ak pi bon jesyon kontrent nan klas la ak kapasite debug.
Telechaje dènye liberasyon Libero SoC la www.microsemi.com/products/fpga-soc/design-resources/design-software/libero-soc#downloads
Jenere yon lisans Libero Silver pou twous ou a www.microsemi.com/products/fpga-soc/design-resources/licensing
Resous Dokimantasyon
Pou plis enfòmasyon sou Twous Evalyasyon IGLOO2 FPGA, ki gen ladan gid itilizatè a, leson patikilye, ak konsepsyon ansyenamples, gade dokiman an nan www.microsemi.com/products/fpga-soc/design-resources/dev-kits/igloo2/igloo2-evaluation-kit#documentation.
Sipò
Sipò teknik disponib sou entènèt nan www.microsemi.com/soc/support ak pa imèl nan soc_tech@microsemi.com
Biwo lavant Microsemi, ki gen ladan reprezantan ak distribitè, yo sitiye atravè lemond.
Pou jwenn reprezantan lokal ou a, ale nan www.microsemi.com/salescontacts
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