Aparèy MICROCHIP USB57 Seri
Espesifikasyon
- Non pwodwi: Aparèy USB57xx
- Manifakti: Microchip Technology, Inc.
- Otè: Andre Rogers
ENTWODIKSYON
This document provides information that helps users start designing with Microchip USB57xx products. It covers select-ing an appropriate device within the device family, device configuration requirements, driver availability, as well as the support and design resources available.
Seksyon
This application note discusses the following topics:
- Section 2.0, Product Selection
- Section 3.0, Special Features
- Section 4.0, Configuration
- Section 5.0, Additional Support and Design Resources
- Section 6.0, Contacting Support
Referans
Pwodwi USB57xx yo gen yon pakèt dokiman ak materyèl sipò ki ka itilize pou ede ak pwosesis konsepsyon ak aplikasyon an. Gade Tablo 1.
TABLE 1: USB57XX SUPPORTING DOCUMENTS
| Kategori | Tit | Deskripsyon |
| Gid pou Konsepsyon Schematic ak PCB | USB5734 Hardware Design Checklist (DS00002968C) | Gid konsepsyon etap pa etap pou aparèy USB5734 yo. |
| USB5744 Hardware Design Checklist (DS00002970B) | Gid konsepsyon etap pa etap pou aparèy USB5744 yo. | |
| Lis Verifikasyon Konsepsyon Materyèl USB5742 (DS00002969B) | Gid konsepsyon etap pa etap pou aparèy USB5742 yo. | |
| AN26.2 Implementation Guidelines for Microchip’s USB 2.0 and USB 3.1 Gen 1
and Gen 2 Hub and Hub Combo Devices |
Contains a wide range of general details for USB hardware design. Schematic and layout guidance is provided which is generally applicable to any kind of USB (or similar high- speed protocols) design. | |
| Nòt aplikasyon | AN1903 – Opsyon konfigirasyon pou USB5734, USB5744, ak USB5742 | Bay map rejis aparèy la ak enfòmasyon sou kijan pou pwograme yon aparèy USB57xx. |
| AN1905 – Chaje batri USB ak fanmi kontwolè Hub USB57x4 la | Gen ladan l yon deskripsyon sou operasyon chaje batri USB nan pò endikatè USB57xx yo. | |
| AN5003 – Debogaj Pwoblèm Lyen USB3 sou Hub USB3 Microchip yo | Prezante gid jeneral pou konprann pwoblèm lyen ak paramèt ajisteman ke ou ka eseye pou amelyore rezilta yo. |
| Kategori | Tit | Deskripsyon |
| AN4767 – USB5734 FlexConOperasyon koneksyon | Details FlexConnect principles of operation, how to control FlexConnect, and system design considerations. | |
| AN1997 – USB-to-GPIO Bridging with Microchip USB 3.1 Gen 1 Hubs | Provides technical description and usage guidelines for the USB-to-GPIO feature. | |
| AN1998 – USB to I2C Bridging with Microchip USB 3.1 Gen 1 Hubs | Provides technical description and usage guidelines for the USB-to-I2C/SMBus feature. | |
| AN1999 – USB to SPI Bridging with Microchip USB 3.1 Gen 1 Hubs | Provides technical description and usage guidelines for the USB-to-SPI feature. | |
| AN2000 – USB to UART Bridging with Microchip USB 3.1 Gen 1 Hubs | Provides technical description and usage guidelines for the USB-to-UART feature. | |
| AN2050 – Dezaktive pòsyon USB 3.1 Gen 1 nan pò Downstream sou Hub Microchip USB57x4 yo | The Microchip USB57x4 family of 4-port USB Hubs allows for the USB 3.1 Gen 1 PHY associated with any of the down- stream-facing ports to be disabled via OTP (One-Time Programmable) configuration. | |
| Aplikasyon Microchip USB57xx USB Kalite-C | The USB57xx family of devices does not support USB Type- C® natively, but can be used within a USB Type-C application with external circuitry. This document provides guidance
ak ansyenamples. |
SELEKSYON PWODWI
Aparèy USB57xx yo disponib ak plizyè konfigirasyon pò ak divès seri karakteristik. Entegratè sistèm final la dwe chwazi aparèy ki pi byen adapte ak koòdone ki nesesè pou sistèm final espesifik li a tout pandan l ap minimize gwosè pake a.
Tablo 2 a montre maksimòm entèfas chak aparèy sipòte. Remake byen ke li pa posib pou aktive tout entèfas sa yo an menm tan paske aparèy yo limite an tèm de broch. Pou chak aplikasyon, yo ta dwe egzamine opsyon broch pwogramasyon yo byen pou detèmine pi bon melanj entèfas ki ka sipòte an menm tan pou chak aplikasyon.
TABLE 2: USB57XX FAMILY OF DEVICES COMPARISON
| Aparèy |
Pake |
Revizyon Silisyòm |
Karakteristik | |||||
| Upstream Port Configuration | Pò en ... | Hub Feature Controller | Bridging Features | FlexConnect Support | BC1.2
Sipò |
|||
| USB5734 | 64 QFN | B | Kalite-B | (4x) USB3.2 Gen1 USB
Kalite-A pò |
Pèmèt | GPIO, SPI, I2C/SMBus, UART | Port 1 Only | All Down- stream Ports |
| USB5744 | 56 QFN | B | Kalite-B | (4x) USB3.2 Gen1 USB
Kalite-A pò |
Pèmèt | GPIO, SPI, I2C/SMBus, UART | Okenn | All Down- stream Ports |
| USB5744B (X01) | 56 QFN | B | Kalite-B | (4x) USB3.2 Gen1 USB
Kalite-A pò |
Andikape | Okenn | Okenn | All Down- stream Ports |
| USB5742B | 56 QFN | B | Kalite-B | (2x) USB3.2 Gen1 USB
Kalite-A pò |
Pèmèt | GPIO, SPI, I2C/SMBus, UART | Okenn | All Down- stream Ports |
| USB5742B (X01) | 56 QFN | B | Kalite-B | (2x) USB3.2 Gen1 USB
Kalite-A pò |
Andikape | Okenn | Okenn | All Down- stream Ports |
Karakteristik espesyal
The Hub Feature Controller
The Hub Feature Controller is an embedded device internal the to hub used to handle many special features. These include runtime register read and write, handling FlexConnect commands, bridging features, and OTP memory pro-gramming and reading.
The Hub Feature Controller uses a generic USB device class controllable through the WinUSB driver on Windows® an dlibusb on Linux®.
The USB5734 always enables the Hub Feature Controller by default (end-system integrators can optionally disable it).
The USB5744 and USB5742 devices have ordering options for Hub Feature Controller to be enabled or disabled by default. These part numbers end in “X01.” (See Table 2.)
Bridging Features
Bridging features allow a USB host to interface with embedded devices through the hub device. The USB host communicates to the internal Hub Feature Controller device embedded inside the USB hub to send or receive data through on e of the bridge interfaces.
The bridge interfaces supported are:
- GPIO
- SPI of up to 60 MHz
- I2C/SMBus of up to 400 kHz
- UART of up to 115.2 kHz
Some of the bridging features can be used in parallel together, while others are mutually exclusive. Consult the specific USB57xx device data sheet for details.
The GPIO, SPI, I2C/SMBus, and UART use the generic USB device class, which is controllable through the WinUSB driver on Windows and libusb on Linux.
End-system integrators are required to write their own end applications to make use of the bridging features. Microchi p provides two software resources to make the software development easy:
- Windows-only: MPLAB® Connect Configurator
MPLAB Connect® Configurator includes a GUI for quickly trying out bridging features. A DLL package is also included for controlling the bridging features from your own application. - Linux-only: Linux Application Code Examples
This package includes numerous exampaplikasyon ki itilize bibliyotèk estanda libusb Linux la pou kontwole aparèy USB. Kòd sa a ka sèvi kòm yon referans pou konsepsyon pwòp aplikasyon final ou yo.
FlexConnect (USB5734 Only)
- USB5734 supports FlexConnect of both the USB2 and USB3 communication channels with downstream port 1.
- FlexConnect can be controlled via a USB command to the Hub Feature Controller device using direct FlexConnect register manipulation through I2C/SMBus or by GPIO control. GPIO requires configuration to be set to ‘Configuration 2 – FlexConnect Mode’ via the CFG_STRAP hard strapping pin. Only one control method should be used at a time to avoid control conflicts leading to non-deterministic behavior.
- FlexConnect requires careful design choices since there is no standard use case for this feature. A common way to use the feature is to allow two different hosts to alternatively control the USB hub and all downstream devices. Only one hu b can control the hub and device tree at a time, and the full device tree must be fully re-enabled each time host control is haded off.
- Another implementation involves “swapping” a host-device relationship wherein the original USB host to the USB57xx becomes a device, and a component which was operating as a device switches to Host mode. This requires careful consideration to properly control three separate system components during role changes.
- Pwoblèm komen yo enkli detèmine ki konektè ak kab pou itilize. Pa egzanpample, when a Type-A port is used on a downstream port and FlexConnect is enabled for that downstream port, connecting a new host to that “Flex Port” requires a non-standard Type-A-to-Type-A cable. In addition, there could be VBUS back-drive problems (and the potential to trigger overcurrent alerts) if both ends of the cable supply 5V VBUS.
- Supporting FlexConnect with USB Type-C ports can be exceptionally challenging as Type-C VBUS, VCONN, and CC control must be well thought out and managed appropriately to ensure reliable connections can be made while flexed.
- Refer to AN4767 – USB5734 FlexConnect Operation for detailed design guidance.
BC1.2 Battery Charging
All USB57xx devices support BC1.2, which is a USB-IF maintained standard for allowing portable devices to charge up to 1.5A from 5V VBUS.
A BC1.2 handshake is always initiated by the portable device. It is achieved through short pulses on the D+ and D–USB2 data lines. The hub downstream port responds accordingly to complete the handshake, depending on which mode of operation the hub port is in.
Dedicated Charging is a charge-only profile and only operates when the USB57xx is not connected to a USB Host.
Charging Downstream Port mode allows for charging and data, and it operates when the USB57xx is connected to a USB host when BC1.2 CDP mode is enabled.
The BC1.2 hardware configuration straps on USB57xx enable both CDP and DCP mode.
KONFIGURASYON
Default Factory-Programmed Configurations
Aparèy USB57xx yo gen anpil karakteristik konfigirasyon ak plizyè broch fonksyon pwogramab disponib ki pèmèt diferan kapasite I/O. Chak aparèy gen opsyon konfigirasyon inik ou ka chwazi atravè broch pyès ki nan konpitè CFG_STRAP, sa ki fè seleksyon broch fonksyon pwogramab pa defo ki baze sou ka itilizasyon ki pi antisipe pou aparèy la. Chak aparèy gen ladan tou paramèt konfigirasyon pwograme nan faktori epi li ka gen ladan tou patch FW pwograme nan faktori.
Additional End-System Integrator Configuration
It is expected that end-system integrators will reconfigure the USB57xx to meet their individual system needs. Peripherals and each pin function can be selected individually to customize the solution. Only changes from the default factory preconfigured settings need to be made.
The following methods for end-system-integrator configuration are flexible:
- OTP
- Serial (I2C/SMBus) from embedded serial controller
- Upstream USB host control during runtime
Additionally, a separate firmware image can be executed from an SPI Flash memory device in special cases where custom firmware implementation is needed. Microchip develops all customized firmware images based on special, case-by-case business negotiations. When executing the firmware image from an SPI Flash device, internal OTP memory configuration is ignored. Instead, an equivalent configuration mechanism is also executed through and stored within the SPI Flash memory device.
Configuration details and the device register map located in the AN1903 – Configuration Options for the USB5734, USB5744, and USB5742 are available on the USB57xx product page on Microchip.com
Chak konfigirasyontage se opsyonèl. Anjeneral, entegratè sistèm final yo chwazi yon sèl metòd konfigirasyon. Nenpòt paramèt endividyèl ki modifye nan etap konfigirasyon pita yo ranplase chanjman rejis ki te fèt nan etap anvan yo. Gade Tablo 3 pou plis enfòmasyon sou metòd konfigirasyon yo.
TABLE 3: NOTES ON CONFIGURATION METHODS
| Eleman | Nòt |
| OTP | The USB57xx devices have 8 kB of OTP configuration memory. The factory-programmed OTP con- figuration load only occupies a small fraction of this total available memory (i.e.: typically <1 kB) to ensure sufficient space is left for end-system integrator use. The end-system integrator can program OTP memory a number of times until the OTP memory is completely filled. Only registers which are specifically manipulated by the OTP configuration are impacted. OTP is loaded sequentially in the order it was programmed, so if the same register(s) are manipulated multiple times, the last sequentially programmed setting(s) will take effect. |
| SPI Flash | Yon memwa Flash SPI ekstèn se yon opsyon pou ka itilizasyon espesyal ki mande yon imaj firmwèr pèsonalize. Imaj firmwèr pèsonalize yo devlope pa Microchip atravè yon akò espesyal avèk yon entegratè sistèm final. Gwosè memwa Flash SPI a depann de bezwen gwosè imaj firmwèr la, men 1 MB jeneralman sifi pou pifò bezwen firmwèr pèsonalize yo. |
| Seri konte genyen | Serial Configuration is enabled through hardware pin strap options. When enabled, the USB57xx device waits indefinitely for the I2C/SMBus or SPI master to configure the device and issue a special command to enter the Runtime phase. The I2C/SMBus or SPI controller will be able to read back any configuration settings already modified by OTP or EEPROM. |
Zouti Konfigirasyon
Microchip gen plizyè zouti ki ka itilize pou konfigire yon USB57xx. Gade Tablo 4.
TABLE 4: USB57XX CONFIGURATION TOOLS
| Zouti | Sistèm operasyon sipòte | Kapasite |
| MPLAB Connect® Configurator GUI | Windows® |
|
| Zouti Entèfas Liy Kòmand (CLI) Konfigiratè MPLAB Connect | Windows |
|
| MPLAB Connect Configurator (DLL) Library | Windows | Enables users to develop their own application that can program/read back configurations, manipulate register settings, control FlexConnect, and control bridging features. |
| Linux® Appli- cation Code Examples | Linux | Gen ladan l plizyè sampaplikasyon ki itilize kapasite estanda libusb Linux yo pou pwograme/li konfigirasyon, manipile paramèt rejis, kontwole FlexConnect, epi kontwole fonksyonalite bridging. |
Remak 1: The VSM Filter allows the Windows host to send vendor-specified commands to the hub endpoint directly. This is typically blocked by Windows OS. The VSM commands to the hub are required for communicating with a Microchip Smart Hub which has its internal Hub Feature Controller device USB endpoint disabled. If MPLAB Connect Configurator detects a Microchip Smart Hub, but the Hub Feature Controller is not present, it will attempt to re-enable the Hub Feature Controller temporarily (while the tool is running) via a VSM command. With the Hub Feature Controller device temporarily enabled, MPLAB Connect Configurator can then carry out the various features supported by the tool (such as programming, register read/write, etc.). Also note that if the VSM command support is internally disabled via the hub configuration (i.e.: previously set in OTP) by an end system integrator, this command will not be successful and the user will not able to read back configuration or program new ones.
Aparèy fanmi USB57xx yo itilize klas aparèy estanda defini pa USB-IF. Sa vle di ke pa gen okenn chofè kliyan oswa chofè espesyal ki nesesè pou opere aparèy la.
ADDITIONAL SUPPORT AND DESIGN RESOURCES
Users may access Microchip’s wide range of hardware and software design tools that support projects with the USB57xx. Most items in Table 5 are available from the device product page. Items that are not linked to the product page are available upon request through a support case (see https://www.microchip.com/en-us/support).
| Kategori | Atik | Deskripsyon |
| Materyèl Evalyasyon | EVB-USB5734 | Kat evalyasyon pou aparèy USB5734 la |
| EVB-USB5744 | Kat evalyasyon pou aparèy USB5744 la | |
| Zouti Simulation | USB3 IBIS-AMI Model | Yon modèl Microchip USB3 PHY ki ka itilize pou simile pèfòmans PCB. Kontakte reprezantan lavant ou a oswa soumèt yon ka sipò pou mande modèl sa a. |
| Modèl USB3 HSPICE | Yon modèl Microchip USB3 PHY ki ka itilize pou simile pèfòmans PCB. Kontakte reprezantan lavant ou a oswa soumèt yon ka sipò pou mande modèl sa a. | |
| Zouti lojisyèl | MPLAB® Connect Configura- tor | Zouti ki baze sou Windows pou konfigirasyon sant ak karakteristik sant entelijan. |
| Linux® USB57xx, 58xx, 59xx ACE Package | Zouti ki baze sou Linux pou konfigirasyon sant ak fonksyonalite sant entelijan. | |
| USB57xx Firmware and Default Configuration Package | Yon pake konfigirasyon files, firmware patches, and firm- ware images. Configuration fileFich yo gen detay sou kontni OTP pwodiksyon pa defo aparèy USB57xx yo. |
KONTAKTE SIPÒ
For additional support, visit the support section of www.microchip.com. A support case can be submitted online to receive personalized assistance, including product selection support, design guidance, design check services, and troubleshooting.
Nou ankouraje tout entegratè sistèm final yo pou yo itilize sèvis konsepsyon gratis Microchip la.view sèvis: https://www.microchip.com/en-us/support/design-help/design-check-services.
ANPÈS A: ISTWA REVIZYON
TABLE A-1: REVISION HISTORY
| Nivo revizyon ak dat | Seksyon/Figi/Antre | Koreksyon |
| DS00006176A (09-16-25) | Premye lage | |
Enfòmasyon sou Microchip
Mak komèsyal yo
Non ak logo "Microchip", logo "M", ak lòt non, logo, ak mak yo se mak komèsyal ki anrejistre epi ki pa anrejistre Microchip Technology Incorporated oswa afilye ak/oswa filiales li yo nan Etazini ak/oswa lòt peyi ("Microchip". Marks"). Ou ka jwenn enfòmasyon konsènan mak komèsyal Microchip nan https://www.microchip.com/en-us/about/legal-information/microchip-trademarks.
- ISBN: 979-8-3371-2015-7
Avi Legal
Piblikasyon sa a ak enfòmasyon ki ladan l yo ka itilize sèlman ak pwodwi Microchip, tankou pou konsepsyon, teste, ak entegre pwodwi Microchip ak aplikasyon w lan. Sèvi ak enfòmasyon sa yo nan nenpòt lòt fason vyole kondisyon sa yo. Enfòmasyon konsènan aplikasyon pou aparèy yo bay sèlman pou konvenyans ou epi yo ka ranplase pa mizajou. Se responsablite w pou asire ke aplikasyon w lan satisfè espesifikasyon w yo. Kontakte biwo lavant Microchip lokal ou a pou plis sipò oswa, jwenn plis sipò nan www.microchip.com/en-us/support/design-help/client-support-services.
ENFÒMASYON SA A SE MICROCHIP "KÒM YO". MICROCHIP PA FÈ OKENN REPREZANTASYON OUBYEN GARANTI KI KIT EXPRESSO BYEN ENPLIKITE, EKRI OUBYEN ORAL, LEGAL OSWA ONYÈ, KI GENYEN AK ENFÒMASYON YO KI GENYEN MEN PA LIMITE A NENPÒT GARANTI ENPLIKITE SOU KI PA Vyolasyon, Komèsyal ak PATISIBILITE, AK PATISIBILITE. GARANTI KI GENYEN AK KONDISYON, KALITE, OSWA PERFORMANS LI.
MICROCHIP PAP RESPONSABLE POU NENPÒT PÈT ENDRÈK, ESPESYAL, PINITIF, AK ENSEDAN, OSWA KONSEKANS, DOGAJ, PRI, OSWA DEPANS KI GENYEN KELÈ AK ENFÒMASYON AN OSWA ITILIZ YO, KELANSAN SA KOZE, MENM SI PWOFÈ SA A. POSIBILITE OSWA DOmaj YO PREVIVWA. NAN PWOFÈ LA LWA OBLÈ, RESPONSABILITE TOTAL MICROCHIP A SOU TOUT REKLAMASYON KI GENYEN KI GENYEN AK ENFÒMASYON AN OSWA ITILIZ YO PAP DEPASSE KANTITE FRÈ A, SI GEN GENYEN, OU TE PEYE DIRECTÈTMAN POU MICROCHIP POU ENFÒMASYON AN.
Itilizasyon aparèy Microchip nan aplikasyon pou sipò lavi ak/oswa sekirite se antyèman nan risk achtè a, epi achtè a dakò pou defann, dedomaje epi kenbe Microchip inonsan kont nenpòt ak tout domaj, reklamasyon, kostim, oswa depans ki soti nan itilizasyon sa a. Pa gen okenn lisans yo transmèt, implicitement oswa otreman, anba okenn dwa pwopriyete entelektyèl Microchip sof si sa di otreman.
Aparèy Microchip Kòd Pwoteksyon Karakteristik
Remake detay sa yo sou karakteristik pwoteksyon kòd sou pwodwi Microchip:
- Pwodwi Microchip satisfè espesifikasyon yo nan Fich Done Microchip yo.
- Microchip kwè ke fanmi li nan pwodwi yo an sekirite lè yo itilize nan fason ki gen entansyon an, nan espesifikasyon opere, ak nan kondisyon nòmal.
- Microchip valè ak agresif pwoteje dwa pwopriyete entelektyèl li yo. Tantativ pou vyole karakteristik pwoteksyon kòd nan pwodwi Microchip se entèdi entèdi epi yo ka vyole Digital Millennium Copyright Act.
- Ni Microchip ni okenn lòt manifakti semi-conducteurs ka garanti sekirite kòd li a. Pwoteksyon Kòd pa vle di ke nou garanti pwodwi a se "ki pa ka kase". Pwoteksyon Kòd toujou ap evolye. Microchip pran angajman pou li kontinye amelyore karakteristik pwoteksyon kòd pwodwi nou yo.
FAQ
Where can I find step-by-step design guidance for specific USB57xx devices?
You can refer to documents like USB5734 Hardware Design Checklist, USB5744 Hardware Design Checklist, and USB5742 Hardware Design Checklist for step-by-step design guidance tailored to each device in the USB57xx family.
How can I disable the USB 3.1 Gen 1 portion of downstream ports on Microchip USB57x4 Hubs?
The USB 3.1 Gen 1 PHY associated with downstream ports can be disabled via OTP configuration. Refer to AN2050 for detailed instructions.
Dokiman / Resous
 |
Aparèy MICROCHIP USB57 Seri [pdfGid Itilizatè USB5734, USB5744, USB5744B, USB5742B, Aparèy Seri USB57, Seri USB57, Aparèy |